A. Field of the Invention
This invention relates to output display means for electronic text editing and display systems using a common bus, and comprises apparatus for establishing data transfers between memory and display units independently of the common bus, while retaining communication between those devices and the common bus when desired.
B. Prior Art
An electronic text editing and display system typically includes data input units for entering textual data to be displayed and edited; data display units for displaying the text; one or more memory units for storing the data to be displayed; an "editor" for correcting or modifying the data being displayed; and an output device that receives the edited text. Typically the display devices comprise cathode ray tubes (CRT's). These are limited persistence devices which require the repeated application of display data to maintain the display, and thus require frequent and massive data transfers from memory.
In one common type of system the memory and editor are incorporated within the data input device itself, as is the display device, to thereby form a self-contained "active" or "intelligent" terminal. These are quite expensive and thus their use is restricted to installations of substantial size which handle large amounts of data to be edited.
Another type of system uses a general purpose digital computer to interconnect one or more input devices with one or more output devices. The necessary data manipulation and control ("editing") functions are performed by the central processor, thereby enabling use of "passive" display devices which are quite expensive. In one form of such a system, all data transfers between the input devices and memory, or between memory and the display devices, take place through the system central processor. The latter constitutes an extensive burden on the central processor, and is especially wasteful in text editing and display systems which incorporate limited persistence display devices such as cathode ray tubes because of the necessity for frequent large scale data transfers between memory and the output display units for purposes of "refreshing" the display. Since such data transfers occupy a substanial portion of the central processor's available time, the number of display units which can be connected into the system is quite limited. These drawbacks can be partly alleviated by associating a captive memory with each display for display-refresh purposes, but this complicates the editing process and substantially increases the required memory capacity.
Some of the disadvantages of the foregoing system are avoided through use of an arrangement in which a common bus system connects the central processor, the memories, and all other units such as input/output units and display units. All data transfers between any of the units of the system, including the central processor, take place over this bus. One example of a common bus arrangement, commonly known as the "Unibus" TM system, is described in detail in U.S. Pat. No. 3,710,324. Briefly summarizing the salient features of that device, the common bus has a number of lines over which address, data and control information is transferred between the devices connected to the bus. All devices, including the central processor, memory, and the peripheral devices, use the same set of signals to communicate with each other; this is achieved in part by providing each device with a similar set of one or more control and status registers, as well as data registers, which utilize the common signal set for communication over the bus.
Each of the registers is directly addressable in the same manner as a memory location, and thus normal memory reference instructions can control all data transfers to and from the various devices; that is, the central processor can treat all other devices connected to the common bus as active memory locations and address them as such. This is a distinct improvement over the intra-system data transfer arrangements, but the number of display devices that can be connected to the bus without causing significant display degradation due to delays in obtaining bus access is quite limited, since only two devices at a time can communicate with each other over the bus.
Memory units having two access ports have heretofore been interposed between the common bus and the display units to thereby remove some of the data transfers in the system from the common bus. However, in such systems, data transfers from memory to memory, such as are often desired to enable a supervisor to monitor editing operations at the various display devices, pass through the central processor and thus burden it.
Accordingly it is an object of the invention to provide an improved text-editing and display system.
Further, it is an object of the invention to provide an improved text editing and display system which can accommodate a substantial number of displays without deterioration of the display quality.
Further, it is an object of the invention to provide a text-editing and display system incorporating a central processor which allows efficient use of the processor for text-editing operations, while accommodating a substantial number of displays.
Another object of the invention is to provide a text editing and display system which facilitates memory-to-display data transfers.
Still a further object of the invention is to provide an improved device interconnection arrangement within a digital computer system utilizing a common bus to connect system components, including the central processor and peripheral devices.